This invention relates to a method of a manufacturing a device, and in particular to a method of manufacturing a semiconductor device involving an underfill injection process.
When a semiconductor device has a semiconductor chip mounted on a mounting board, or a semiconductor device is formed by stacking a plurality of semiconductor chips, a resin material called “underfill” is injected into a space between the board and the semiconductor chip or between the stacked semiconductor chips and cured in order to protect bumps, to enhance the connection strength, and to improve the moisture resistance.
In general, a side-fill method utilizing capillary action is employed to inject an underfill material (filler). However, as the degree of integration within a semiconductor device increases, the gap between a board and a semiconductor chip or between semiconductor chips becomes smaller, which leads to various problems, including increased time required for the injection, generation of voids in the injected resin, and unwanted interruption of the injection process.
In order to solve these problems, Japanese Laid-Open Patent Publication No. 2007-59441 (Patent Document 1) proposes to plasma treat, with N2 gas, the surface of at least one of the semiconductor chip and the mounting board before injecting the underfill material into the space between the mounting board and the semiconductor chip. It is claimed that, according to this method, the angle of contact between the epoxy-based underfill material and a passivation film becomes smaller, and hence the wettability of the underfill material with the passivation film is improved, resulting in improved filling property of the underfill material.